First date of publication: 05 october 2006

Last date of modification: 09 january 2007

Renaming 754r into 754-2008: 23 september 2008

- introduction
- numeric data structures
- multi-base computer
- multi-exponent computer
- multi-decimal computer
- third mode of multi-decimal computer
- listing of multi-decimal computer
- some remarkable bit-patterns

This document gives a description about the trade-off between the maximum value and the accuracy of a floating-point number in a computer. It shows that a greater maximum results in a lower accuracy for the same length of the number in bits and vice-versa.

This fact is explained by the application of three hypothetical computers. First the general aspects of the numbers they store are described. Then separately the three computers are.

The three computers are a so-called 'multi-exponent-base' (shorthand: 'multi-base') computer, a 'multi-exponent-length' (short: 'multi-length') computer and a 'multi-decimal-notation' (short: 'multi-decimal')computer.

The hardware of the multi-decimal computer operates mainly in the decimal way. That of the two other computers operates basically in the binary way. Each of the three computers can operate in one out of four different modes. That mode is selected by the software, e.g. by an instruction in the user's program.

The three computers have a memory-word size of 16 bits. They store a floating-point value in one such word. That value is represented in the well-known sequence of a sign, an exponent and a coefficient. (The old word for coefficient is mantissa.)

Since the sign is the +/- sign of the total numeric value this value is written in the sign-and-magnitude notation. So there are two zeroes that are numerically equivalent: +0 and -0. In the further discussions the sign is not of much importance, so often it will be 'forgotten'.

In all three computers in all modes the sign occupies the leftmost bit of the word. The absolute magnitude of the numeric value is stored in the remaining 15 bits. It consists of two parts, the exponent and the coefficient. The size (= length in bits) and layout (= meaning of every bit) of each part are determined by the type of the computer and by the selected mode.

In all three computers and in all modes the exponent is stored in the excess-bias notation. Both the length in bits and the base of the exponent depend on the type of the computer and on the selected mode. On their turn they set the exponent bias and some coefficient properties.

Special values like NaN and Infinity are applied only in one mode in the multi-decimal computer. In that computer also some bit patterns are illegal. In the other two computers all bit patterns represent an ordinary numeric value.

The bits not occupied by the sign and the exponent are occupied by the coefficient. So the length of the exponent determines the length of the coefficient according to the formula:

*#CoefficientBits = 15 - #ExponentBits*

The coefficient is notated as two sequences of digits, the integral part and the fractional part, with a virtual separator in between. Every digit is represented by a small package of consecutive bits. All digits have the same length (= number of bits). This length depends on the maximum value that can be stored in it. That value equals exponent_base - 1. The digit's minimum value is always zero. The following table shows the dependences:

|------------- d i g i t ------------| basics of exponent type length maximum minimum hardware base # bits value value binary 2 bit 1 1 0 binary 4 duobit 2 3 0 binary 8 octal 3 7 0 binary 16 hexadec. 4 15 0 decimal 10 decimal 3 to 4 9 0

Another name for duobit is 'quit' = quarternary bit. That name is not used here.

In the computers with binary hardware the settings are chosen such that always an integral number of digits fits in the coefficient. There are no 'broken digits' in these machines.

In the computer with decimal hardware the way of storing the digits is more complicated since the series can be compressed. Then in average each digit occupies less length. Even a broken digit is used in one mode!

Always the coefficient contains an integral part, a fractional part and a virtual separator in between. In all cases except that with the broken digit the first digit is in the integral part before that separator, and all other digits are in the fractional part after the separator. A hidden-digit notation similar to the hidden-bit notation in the IEEE-754 definition for the binary floating-point numbers is applied never by the hypothetical computers.

The next chapters deal with the three hypothetical computers separately.

The first of the hypothetical computers is the so-called 'multi-base' computer. This computer can work with different exponent bases, hence its name. The active base is selected from a predefined set of bases by a program instruction. This instruction itself is not important for our discussion. The bases it can work with are binary, duo-binary, octal and hexadecimal. It does not work with the decimal base.

The computer has a fairly small data bus and therefore works with floats of 16 bits. In every exponent-base mode the meaning of these bits is:

bit 15 = +/- sign (1 bit) bit 14 - bit 12 = exponent (3 bits) bit 11 - bit 00 = coefficient (12 bits)

The exponent is always written as a binary integer and with an excess bias. The range of this integer is from 0 to +7. The excess bias is set to 4, so the resulting exponent-value goes from -4 to +3. Special values like NaN and Infinity do not exist.

The numeric value is written in the sign-and-magnitude notation. The coefficient is represented by a series of 12 bits. When this series were an integer number its value would range from 0 to 4095. Actually it is split up in digits of 1 to 4 bits. The splitting depends on the selected exponent base.

In the binary mode the length of the digits in the coefficient is one bit. So the coefficient contains 12 digits. When it is normalized its first digit (= digit nr. 11) is always 1, except when the value of the total number is zero. The base of the exponent is 2.

In the duo-binary mode the length of the coefficient digits is two bits. The coefficient now has six digits. Normalization makes the first set of two bits unequal to zero. So either bit 11 or bit 10 or both are one. Then never simultaneously both are zero, except when the total value is zero. The base of the exponent is 4.

In the octal mode the coefficient consists of four digits of three bits each. Normalization makes at least one of the three bits 11, 10 and 9 to be one, except when the total value is zero. The base of the exponent is 8.

In the hexadecimal mode the coefficient has three digits of four bits each. In normalization at least one of the four bits 11, 10, 9 and 8, is not zero when the total value is not zero. The base of the exponent is 16.

The following discussion holds only when the value of the total number is not zero. Then at least one bit of the coefficient is 1. Also normalization is assumed, so the first digit is at least 1.

The guaranteed relative accuracy depends on the selected mode. In the binary mode it is at its highest since the leftmost bit of the coefficient, bit 11, is always 1. In the hexadecimal mode it is at its lowest since the bits 11, 10 and 9 altogether can be zero.

All four numbers have their maximum value when all bits 14 to 0 have the value 1. They have their normalized minimum value when all bits 14 to 0 are zero, except the bit immediately at left of the period.

Here is a listing of the properties of the four different types of floats. The values are given in decimal. '#' = number of.

Base type ---> bit duobit octal hexadec --- COEFFICIENT --- # bits per digit 1 2 3 4 # digits 12 6 4 3 maximum value of a digit 1 3 7 15 minimum value of a digit 0 0 0 0 # digits at left of period 1 1 1 1 # digits at right of period 11 5 3 2 # bits at left of period 1 2 3 4 # bits at right of period 11 10 9 8 (= length of fraction) minimum value (normal.) 1 1 1 1 maximum value (approx.) 2 4 8 16 guaranteed accuracy in # digits 11 5 3 2 value 2^(-11) 4^(-5) 8^(-3) 16^(-2) value, as a ratio 1/2048 1/1024 1/512 1/256 value, decim.approx. 0.0005 0.001 0.002 0.004 in # bits 11 10 9 8 decimally, approx. 3.3 3.0 2.7 2.4 --- EXPONENT --- range of expon.integer 0/7 0/7 0/7 0/7 excess bias 4 4 4 4 range of expon.value -4/+3 -4/+3 -4/+3 -4/+3 exponent base 2 4 8 16 minimum exponent 2^(-4) 4^(-4) 8^(-4) 16^(-4) this is approx. 0.0625 0.00391 2.44E-4 1.53E-5 maximum exponent 2^3 4^3 8^3 16^3 this is exactly 8 64 512 4096 --- TOTAL VALUE --- minimum, normalized 0.0625 0.00391 2.44E-4 1.53E-5 maximum, approximated 16 256 4096 65536 maximum, exact 15.99609375 255.9375 4095 65520

The table shows that a slight decrease of the guaranteed accuracy by applying a greater exponent base gives a hughe increase in the value range. This is the reason why the value range of the decimals stored according to the IEEE-754-2008 norm is greater than the range of the 'corresponding' binaries.

The value range can even be increased in a steeper way than by the multi-base computer! We take another small computer that always works fully binarily. It has the word size of 16 bits and does not apply the hidden bit and special values. Again the coefficient is normalized.

It is our second hypothetical computer, the 'multi-exponent' computer. It applies the floating-point numbers in binary only. But it is able to vary the length of the exponent, hence its name. The computer can apply an exponent of 3 bits, but also an exponent of 4 bits, and of 5 and 6 bits. It automatically sets the excess bias at the half of the exponent range.

The coefficient decreases in length when the exponent length increases. Then the virtual period shifts to the right. The integral part stays one bit long. But the length of the fractional part decreases and so does the guaranteed accuracy.

The bit structure of the floating-point numbers is:

|------- b i t i n d i c e s --------| | | exponent | +/- m a n t i s s a | length sign exponent integral fraction # bits bit bits bit bits 3 15 14 - 12 11 10 - 0 4 15 14 - 11 10 9 - 0 5 15 14 - 10 9 8 - 0 6 15 14 - 9 8 7 - 0

The listing of the properties in the four length-modes becomes:

Exponent length ---> small medium large extra-large --- EXPONENT --- length in # bits 3 4 5 6 range of expon.integer 0/7 0/15 0/31 0/63 excess bias 4 8 16 32 range of expon.value -4/+3 -8/+7 -16/+15 -32/+31 exponent base 2 2 2 2 minimum exponent 2^(-4) 2^(-8) 2^(-16) 2^(-32) this is approx. 0.0625 0.00391 1.53E-5 2.33E-10 maximum exponent 2^3 2^7 2^15 2^31 this is 8 128 32768 2.15E+9 --- COEFFICIENT --- length in # bits 12 11 10 9 # bits before period 1 1 1 1 # bits after period 11 10 9 8 minimum value (normal.) 1 1 1 1 maximum value (approx.) 2 2 2 2 guaranteed accuracy in # bits 11 10 9 8 value 2^(-11) 2^(-10) 2^(-9) 2^(-8) value, as a ratio 1/2048 1/1024 1/512 1/256 value, decim.approx. 0.0005 0.001 0.002 0.004 decimally, approx. 3.3 3.0 2.7 2.4 --- TOTAL VALUE --- minimum, normalized 0.0625 0.00391 1.53E-5 2.33E-10 maximum, approximated 16 256 65536 4.29E+9 maximum, exact 15.99609375 255.875 65472 *****

This table shows that a slight decrease of the coefficient length results in a giant increase of the minimum-maximum range of the total value.

Together both tables of the multi-base and the multi-exponent computer show that with the same guaranteed accuracy the minimum-maximum range increases when the exponent base is made smaller.

A third hypothetical computer is introduced, a decimal one which can operate also in four modes. Again the machine has 16 bit numbers, with the first bit as sign bit. The exponent is stored as a binary integer and the coefficient is stored as a sequence of decimal digits. In all modes the exponent base is 10. So in fact this computer is a multi-exponent computer with base 10.

In the first mode each digit is stored in a four-bit unit called a 'nibble'. In the other three modes three digits are intermingled by the Densely Packed Decimal compressor which is the basis of the IEEE-754-2008 encoding of decimal numbers, and then stored together in a space of ten bits.

In the first three modes the computer cannot store special values like NaN and infinity, but in the fourth mode (called PDE) it can. That mode approximates at best the Packed Decimal Encoding of IEEE-754-2008.

In listing the four modes are:

exponent coefficient mode size bits size structure BCD 3 14-12 12 3 BCD-digits of 4 bits each DPD-1 5 14-10 10 3 digits in 10 bit DPD-code DPD-2 3 14-12 12 3 digits in 10 bit DPD-code preceded by one 'digit' of 2 bits PDE value=0,1,2 10+3 4 digits, 3 of them in 10 bit DPD-code and one combined with exponent field

For each mode the drawing of the word structure is:

+---+----------+------------+------------+------------+ |+/-| 3 bits | 4 bits | 4 bits | 4 bits | |si | expo- | first | second | third | | gn| nent | digit | digit | digit | +---+----------+------------+------------+------------+

+---+-------------------+-----------------------------+ |+/-| 5 bits | 10 bits for | |si | for | 3 digits in | | gn| exponent | Densely Packed Decimal | +---+-------------------+-----------------------------+

+---+----------+--------+-----------------------------+ |+/-| 3 bits | 2 bits | 10 bits for | |si | expo- | 'half' | 3 'full' digits in | | gn| nent | digit | Densely Packed Decimal | +---+----------+--------+-----------------------------+

+---+-------------------+-----------------------------+ |+/-| combination field | 10 bits for | |si | for exponent, one | 3 digits in | | gn| digit and specials| Densely Packed Decimal | +---+-------------------+-----------------------------+

The first mode is the most simple way of storing a decimal number. The exponent is a binary integer and the coefficient is a sequence of digits. Each digit is stored in a space of 4 bits. The virtual point is between the first and the second digit, so two digits are behind it and one is before it.

The digits are encoded by the so-called Binary Coded Decimal (= BCD) code. This is the set of bit patterns ubiquitously used to store a decimal digit into four bits. The table of storage is:

BCD-storage: Digit Bit-pattern 0 0 0 0 0 1 0 0 0 1 2 0 0 1 0 3 0 0 1 1 4 0 1 0 0 5 0 1 0 1 6 0 1 1 0 7 0 1 1 1 8 1 0 0 0 9 1 0 0 1

The table shows that every digit uses only 10 out of the 16 possible bit patterns in the 4-bits sequence. The other 6 are illegal. Consequently many coefficient patterns are illegal. They have at least one false digit. Only 1000 patterns out of the possible 4096 are legal. So three quarters of all possible patterns must be discarded!

This enormous waste is an incentive for compressing the three digits into a more confined space. The Densely Packed Decimal (= DPD) compression make them fit for a storage together into 10 bits. The two digits thus freed can be used in several ways, like the three other modes show. In all of them 4000 out of the 4096 bit patterns are used. So the waste is very small.

In the second mode the two digits that have become free by compressing the three digits into DPD-code are given to the exponent. Now the exponent is a binary integer of 5 bits. Its value range has become four times bigger compared with the case of the ordinary BCD-storage for the coefficient.

Note that not all bit patterns of the coefficient are legal. A few are not. These are the patterns that are not supported by the DPD-encoding. This encoding rejects 24 of the 1024 10-bit patterns. So approx. 2.5 percent of the patterns is illegal. One of them is the one filled with all ones. Storing such an unused pattern or calculating with it will lead to an error trap. The pattern filled with all zeroes is legal. The value it stands for is 0.

Since the DPD-encoding mixes up the bits the location of the virtual period in the coefficient is blurred. This point can be located only after the decoding which expands the coefficient into the three separate digits. It is between the first and the second digit, similar as in the first mode.

In the next two modes the value range of the coefficient is increased at the cost of the exponent range.

The fourth mode approximates the Packed Decimal Encoding (= PDE) of IEEE-754-2008 at best. The combination field contains the first digit of the coefficient and the bits of the exponent. The coefficient has a tail of three digits, so its total length is four digits.

The digit in the combination field is the most significant one. The virtual point is after this digit, so all three digits in the DPD encoding are after this point.

The exponent has no tail, so its integer value can be 0, 1 or 2 only. Thus the number of its possible values is not even. Consequently the multiplication product of the smallest normalized and the biggest value is not 100, in contrast to the real applications of PDE. The excess bias is chosen such that this product is 10.

The special values NaN and Infinity can be stored. Then the contents of the coefficient does not make sense. For these values the bit patterns of the combination field are: Infinity = 11110 and NaN = 11111. In the latter case the first bit of the coefficient serves for storing the type of the NaN: quiet = 0 and signaling = 1. Thus all special values are stored in the first byte of the number. Then the other byte is not looked at.

For the ordinary numeric values the bit pattern in the combination field looks somehow artificial. At first sight one might say 'Keep it simple', and use one bit for the exponent with four bits for the digit in BCD-code. Then the range of the exponent would be 0 and 1 only. The artificial construction gives a third value, viz. 2, to this range, thus increasing its size by 50 percent.

The third mode contains a fairly complex operation for the normalization. Therefore the properties of this mode are discussed in a separate chapter, the next one.

The third operation-mode of our hypothtical multi-decimal computer is the mode most difficult to understand since the first coefficient digit is not complete. It is only a 'half digit' of two bits. Its value range is 0, 1, 2 and 3. Since the virtual point cannot be located in the midst of a digit it is located after the first complete digit. Thus the minimum value of the coefficient is 00.00 and its maximum is 39.99 which is near 40.

The presence of the incomplete digit makes the normalization more tricky and complicated. The virtual 'digit' that is the leftmost digit in the normalization spreads over this first digit and the 'half of the second digit'.

Therefore this normalization will be explained by connecting a ticking clock to the computer's CPU. At every clock tick four things will happen:

- First the 10-bits part of the coefficient is expanded into a 12-bits series wherein the three digits are stored seperately. These are the three 'complete digits' of the coefficient. The expanded digits are stored in a special location for temporary storage. Now the total coefficient has spread three and a half digits over 14 bits.
- Secondly the virtual point is placed between the first and the second complete digit. So it is between the first six and the last eight bits of the expanded coefficient. Consequently there are one and an half digit before this separator, and not only one digit as in the other three modes.
- At third a 1 is added to the last of the expanded digits. When the value of this digit was 9 then one or more of the other two and a half digits are affected. Perhaps the exponent is affected too. The weird normalization is applied. It is discussed in detail below.
- At fourth the 3 complete digits are squeezed from their 12 bits into 10 bits, so they can return into their coefficient part of the number.

The third step at the clock tick in the third mode will be explained in more detail.

Let us start with the value of the coefficient somewhere in the midst of its range, e.g. 20.00, and the value of the exponent small, e.g. 0. The coefficient is increased continuously by the steady addition of 1 to the last digit. For example, the clock tick increases the numeric value from 20.00E+0 to 20.01E+0. The size of the increase is 0.01E+0.

At a certain moment the coefficient value approaches the end of the range by becoming 39.96, 39.97, 39.98 and 39.99. The next value should be 40.00, but this is impossible since it cannot be stored. The whole number must be re-normalized: the digits are shifted to the right over one position and the exponent is increased by one. So the value of the total number before the clock tick was 39.99E+0. After the clock tick it will not be 40.00E+0, but it becomes 04.00E+1. Clearly the smallest number greater than 39.99 is 04.00E+1. The rightmost zero of the coefficient is pushed away.

When the clock ticks again then a new 1 is added to the last digit of the coefficient. Now the coefficient becomes 04.01 which equals to 40.10, not to 40.01. So the numeric value increases from 04.00E+1 to 04.01E+1. The size of the increase is 0.01E+1. The increase is ten times as big as previously.

When the steady increase by 1 is continued no remarkable thing will happen, until the coefficient reaches the value 39.99 again and has to surpass it. Again a coefficient shift and an exponent adjustment are applied, so that the next numeric value will not be 40.00E+1, but it actually becomes 04.00E+2.

Clearly always when the coefficient value to be stored crosses the imaginary border between 39.99 and 40.00 then the numeric representation makes a 'jump'.

Now let us operate in the reverse direction. At every clock tick the value 1 is subtracted from the last digit. For example 24.70E+4 becomes 24.69E+4. At first instance the coefficient would be zero after 3999 ticks. But 'alas', we now have the desire to keep the coefficient as large as possible, irrespective the value of the exponent.

When the 1 is subtracted from the coefficient value 04.00 then the following happens: Before the subtraction this value is reshaped to 40.00 and the exponent is lowered by 1. Then the subtraction by 1 is applied. For example, 04.00E+5 becomes 39.99E+4 (not 39.90E+4). Again there is a 'jump' in the representation between the coefficient values 04.00 and 39.99.

Clearly the coefficient is at its largest when its value is in the range from 04.00 to 39.99. Then it is said to be normalized. The above-mentioned 'jumps' are part of this normalization process. Every coefficient value below 04.00 is said to be un-normalized. Examples: 03.99, 02.67, 01.25, 00.01. The ratio between the maximum and the minimum normalized value approximates 10. This value is the exponent base.

The excess bias of the exponent cannot be chosen such that the range of normalized values is symmetrical around 1, otherwise the exponent would have a fractional part too. Of course this makes the calculations extremely complicated. It makes no sense since the symmetry is not required. It is a design-help solely.

Actually the symmetry can be located around the minimum value of the coefficient, 4. Then the symmetry formula becomes:

*normalized_minimum / 4 = 4 / maximum*

Or stated otherwise:

*maximum * normalized_minimum = 16*

The addition of the incomplete digit to the sequence of the complete digits increases the guaranteed accuracy by a factor 4, and so the decimal accuracy by 10_log(4) = 0.6. Therefore the squeezing of the three digits into 10 bits makes sense.

In a computer wherein the incomplete digit consists of three bits its value ranges from 0 to 7. Then the value range of the normalized coefficient would be from 08.00 to 79.99. Then the guaranteed accuracy increases with 8, and the decimal accuracy increases with 10_log(8) = 0.9.

Note that an incomplete digit can never be in de midst of a digit sequence. It must always be the leftmost one, like it is in the third mode. We have seen how the presence of such a digit makes the normalization more tricky and complicated. The leftmost digit that should never be zero in the normalization process has become virtual. It spreads over the incomplete first digit and the 'half of the second digit'.

Irrespective the maximum value of the first digit the ratio between the maximum and the minimum normalized value always approximates the exponent base, 10. Of course this holds also when this digit is complete.

In case the first digit is complete and so its value ranges from 0 to 9 then at first sight the value of the normalized coefficient would range from 10.00 to 99.99. But when the virtual point must be located after the first complete digit then this value ranges from 1.000 to 9.999, as is used in the fourth mode of our computer.

Let us connect the ticking clock to the computer's CPU in all these cases. At every tick a 1 is added to the last digit of the coefficient. The 'jump' in the presentation of the total number will occur when otherwise the first digit would overflow. When this digit has three bits then this occurs when its value should go from 7 to 8. The digit itself becomes 0 and the one at its right gets the value 8.

When the digit is complete the 'jump' occurs when its value should go from 9 to 10. In this case the digit at its right should get the value 10. Actually this means: the first digit gets the value 1 and the one at its right is made 0. This is the normalization well-known to us for all digits complete.

The abbreviations for the three systems worldwide ubiquitously used for encoding the decimal digits and numbers are:

- BCD = Binary Coded Decimal = simplest way to store a digit
- DPD = Densely Packed Decimal = packing 3 digits into 10 bits
- PDE = Packed Decimal Encoding = IEEE-754-2008 definition for storing a numeric value in floating-point notation

In listing the four modes of the multi-decimal computer are:

Mode number ---> 1 2 3 4 Mode type -----> BCD DPD-1 DPD-2 PDE --- COEFFICIENT --- # bits for last 3 digits 12 10 10 10 # digits 3 3 1/2+3 4 maximum value of a digit 9 9 4, 9 9 minimum value of a digit 0 0 0 0 # digits at left of period 1 1 1/2+1 1 # digits at right of period 2 2 2 3 (= length of fraction) minimum value (normal.) 1 1 4 1 maximum value (approx.) 10 10 40 10 maximum value (exact) 9.99 9.99 39.99 9.999 guaranteed accuracy as relative ratio 1/100 1/100 1/400 1/1000 value 0.01 0.01 0.0025 0.001 in # digits = decimally 2 2 2.6 3 --- EXPONENT --- # of bits 3 5 3 ** range of expon.integer 0/7 0/15 0/7 0/2 excess bias 4 8 4 1 range of expon.value -4/+3 -8/+7 -4/+3 -1/+1 exponent base 10 10 10 10 minimum exponent 0.0001 10^(-8) 0.0001 0.1 maximum exponent 1000 10^(+7) 1000 10 --- TOTAL VALUE --- minimum, normalized 0.0001 1.E-8 0.0004 0.1 maximum, approximated 10000 1.E+8 40000 100 maximum, exact 9990 999E+5 39990 99.99

The tables of the three computers (multi-base, multi-exponent and multi-decimal) show that a slight decrease of the guaranteed accuracy results in a great increase of the value range. Together they show that with the same guaranteed accuracy this value range becomes greater when the exponent base is kept small. Reversely the difference between the maximum and its approximation increases.

Some remarkable bit patterns in the multi-base computer and the multi-exponent computer are shown here. The patterns for the greatest and the smallest un-normalized value are equal in all modes in both computers, but the values they stand for are not. When all bits are zero the value is always zero in all modes in both computers. Although to get the numeric zero value only the coefficient bits need to be zero.

Bit pattern of maximum value for all types of numbers: in comp-1 and -2: + 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 Bit pattern of minimum normalized values: comp-1: comp-2: binary | 3-bExp + 0 0 0 1.0 0 0 0 0 0 0 0 0 0 0 duobit | 4-bExp + 0 0 0 0 1.0 0 0 0 0 0 0 0 0 0 octal | 5-bExp + 0 0 0 0 0 1.0 0 0 0 0 0 0 0 0 hexadec | 6-bExp + 0 0 0 0 0 0 1. 0 0 0 0 0 0 0 0 Bit pattern of minimum value for all types of numbers: in comp-1 and -2: + 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 Bit pattern giving zero value in all types of numbers: in comp-1 and -2: + 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

Herein:

comp-1 = multi-base computer

comp-2 = multi-exponent computer

5-bExp = 5-bits exponent

+ = bit for +/- sign

. = virtual period in coefficient

Two remarkable bit-patterns in the multi-decimal computer and their meaning are discussed here.

Herein: + = bit for +/- sign

In all four modes this bit pattern is illegal or means a NaN:

although some other bit patterns can be illegal or a NaN too.+ 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1

In all four modes this bit pattern means the zero value:

although some other bit patterns can mean a zero too. These are the patterns wherein all bits of the coefficient part are zero.+ 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0